The present invention relates to an analogue gate drive for insulated gate power semiconductors. More specifically it relates to control of the current and voltage switching trajectories of insulated gate power semiconductor switches, which has application in the area of fundamental power electronics.
MOSFETs and insulated gate bipolar transistor devices (IGBTs) are used in switch mode power supplies (SMPS) because of their easy driving ability and their ability to handle high currents and voltages at high-switching frequencies.
However, the switching trajectories for both types of devices are responsible for both common-mode electromagnetic emissions generated by the drain current waveform and power losses in the commutation cell. These two characteristics represent opposing design objectives for power converters. As requirements of miniaturisation drive the switching frequencies higher, a satisfactory trade off between electromagnetic interference (EMI) and power losses becomes increasingly difficult.
The characteristic rectangular voltage waveform of SMPS is modelled as a periodic trapezoidal pulse train. This waveform produces E-field radiation and common mode conducted interference which is caused by parasitic capacitances to ground returns.
Electrostatic screening (of known type) and circuit references (Zverev et al, Proc. IEEE PESC ""97, Missouri, USA) can be used to minimise the effects of electromagnetic field and any induced common mode coupling. However the similarity of the rectangular switching currents in the commutation circuitry produces significant changing magnetic flux. This induces high frequency noise throughout the circuit, resulting in H-field radiation and interference with harmonics, which can extend beyond 100 Mhz.
An additional constraint on any design or modification is that the device must still be electromagnetically compatible (EMC) (that is, complying with all applicable standards, for example the European CISPR recommendations).
Also, in the avoidance of the problems associated with EMC, magnetic material for shielding, such as steel, can be used. However the performance of such shields drops off sharply above 500 KHz.
Improvement methods for power converters that are EMC fall into three classes. Firstly, there are methods of containment and dissipation, such as shielding. Secondly, parasitic components contributing to EMI can be minimised. An example of such a method is to minimise the current loop area through decoupling and layout.
Thirdly are methods that allow for the reduction of EMI generated at the commutation source. Such methods can be effective but can add significant complexity to the design of any device. For example, soft switching resonant and quasi-resonant topologies can be used.
However, the drawback of such a method is the higher conduction loss, higher voltage stress and more numerous or larger componentry.
A further example of these third methods is one that slows the current rise and fall times with the addition of gate resistors. However the disadvantage is that the gate resistor limits the amount of current available to charge the parasitic gate-drain capacitance (Miller capacitance) as the drain voltage changes. This leads to slow voltage switching times.
However the trade off between EMI and power loss is becoming increasingly difficult as switching frequencies move higher.
An alternative approach is to eliminate or reduce EMI generation at its source. One possible solution is that disclosed by Consoli et al (xe2x80x9cAn innovative EMI reduction design technique in Power Convertersxe2x80x9d, IEEE Trans. On Electromagnetic Compatibility, Vol 38, No. 4, November 96) and by Musumeci et al (xe2x80x9cSwitching-behaviour Improvement of Insulated Gate-Controlled Devicesxe2x80x9d, IEEE Trans. On power electronics, Vol. 12, No. 4, July 1997). The solution proposed by both is an EMI reduction technique based on a digital method, using carefully timed current sources to overcome the miller capacitance effect during switching.
An object of the present invention is the provision of an analogue gate drive technique which allows the independent and optimal control of the drain current and voltage waveforms in switched mode converters using insulated gate power devices.
A further object of the present invention is the provision of a gate drive technique which overcomes or at least mitigates some of the abovementioned disadvantages, or at least provides the public with a useful choice.
According to a first aspect of the invention there is provided a circuit for independent control of drain current and voltage for an insulated gate switching circuit, for a switching mode power supply, said circuit including:
an insulated gate semi-conductor device;
a linear buffer; and
a combined voltage source and current source within a local feedback loop operable during turn-off; wherein the rate of change of current is controlled by the gate voltage traversing the transconductance curve.
According to a second aspect of the invention there is provided a gate drive circuit for an insulated gate semiconductor device including:
a voltage source;
a current source; and
a feedback signal, wherein a combination of the voltage source and current source are adapted to provide a gate signal for an insulated gate semiconductor device, such that the gate signal allows independent control of drain current and drain voltage during the turn-on or turn-off of said insulated gate semiconductor.
Preferably the feedback signal is the gate charge (or discharge) current of an insulated gate semiconductor.
Preferably the voltage and current components of the gate signal are adapted to be co-dependent depending on the feedback signal.
Preferably the gate signal output is a linear buffer having a low impedance output and in particular the linear buffer is an operational amplifier of similar.
Preferably the voltage source and current source may be a combined voltage and current source having a low output impedance.
Preferably the voltage source and current source are adapted to provide either current control or voltage control of the driving signal depending upon the state of the feedback signal.
Preferably the rate of change of drain current is controlled by the voltage source traversing a transconductance curve of an insulated gate semiconductor.
Preferably the rate of change of the drain voltage is controlled by dynamic variations in the current source due to feedback.
Preferably the gate signal is the gate signal of either a MOSFET or an IGBT.
According to another aspect of the present invention there is provided a circuit for independent control of drain current and voltage for an insulated gate switching circuit, for a switching mode power supply, said circuit including:
a low impedance controlled ramp voltage source, to control the drain voltage slope and drain current slope during switching;
a low impedance voltage linear buffer with a ramp function as its input; wherein both the voltage source and the linear buffer are operable during turn-on, wherein the rate of change of the voltage is limited by the output impedance of the buffer.
Preferably the rate of change of drain current is controlled by the voltage source traversing a transconductance curve of an insulated gate semiconductor.
Preferably the gate signal is the gate signal of either a MOSFET or an IGBT.